
IDT82V3355
SYNCHRONOUS ETHERNET WAN PLL
Functional Block Diagram
11
May 19, 2009
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
EX_
SYNC3
Mo
nito
rs
T0
PF
D
&L
PF
Di
vi
de
r
T4
PF
D
&L
PF
Di
vi
de
r
AP
LL
M
icr
op
ro
ce
ss
or
In
te
rfa
ce
JT
AG
PB
O
Ph
as
eOf
fs
et
77
.7
6MH
z
T4
AP
LL
T0
AP
LL
Di
vid
er
OU
T1
_P
O
S
OU
T7
MU
X
OU
T2
OU
T3
MU
X
MU
X
T4
AP
LL
MU
X
T0
AP
LL
MU
X
T4
In
pu
t
Se
le
ct
or
T0
In
pu
t
Se
lec
to
r
OSCI
77
.7
6M
H
z
16
E1
/1
6T
1
12
E1
/2
4T
1/
E3
/T
3
16
E1
/1
6T
1
12
E1
/2
4T
1/
E3
/T
3
Au
to
Div
ide
r
Au
to
Di
vi
de
r
10
T0
D
PLL
T4
DP
LL
Input
IN
1_
C
M
OS
IN
1_
D
IF
F
EX_S
YNC1
IN2
_CMO
S
IN2
_DI
FF
EX_S
YNC2
IN3
_CMO
S
FR
SY
NC_
8K
MF
RSYNC_
2K
O
utput
G
SM
/G
PS
/16E1/
16
T1
T
077
.7
6
MH
z
T0
8
kH
z
ET
H
/OBSA
I/1
6E
1/
16
T1
8k
D
ivi
de
r
Inpu
tP
re-
Di
vi
de
r
Pr
io
rity
Inpu
tP
re-
Di
vi
de
r
Pr
io
rity
Inpu
tP
re-
Di
vi
de
r
Pr
io
rity
Inpu
tP
re-
Di
vi
de
r
Pr
io
rity
Inpu
tP
re-
Di
vi
de
r
Pr
io
rity
Di
vi
de
r
EX_
SYN
C
1
EX_
SYN
C
2
EX_
SYN
C
3
16
E
1/
16
T
1/
O
B
S
A
I
16
E1
/1
6T1
/O
B
SAI
OUT
1_NE
G
N
ot
e:
C
on
fig
ura
tio
n
of
O
U
Tn
(n
=3
,7)
ET
H
M
U
X
ple
ase
re
fe
rto
Ta
ble
2
5-2
7.